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PD - 9.1237
IRLI640G
HEXFET(R) Power MOSFET
Isolated Package High Voltage Isolation = 2.5KVRMS Sink to Lead Creepage Dist. 4.8mm Logic-Level Gate Drive RDS(ON) Specified at VGS = 4V & 5V Fast Switching Ease of paralleling Description
Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing.
VDSS = 200V RDS(on) = 0.18 ID = 9.9A
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 5.0V Continuous Drain Current, VGS @ 5.0V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw.
Max.
9.9 6.3 40 40 0.32 10 290 9.9 4.0 5.0 -55 to + 150 300 (1.6mm from case) 10 lbf*in (1.1N*m)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient
Min.
---- ----
Typ.
---- ----
Max.
3.1 65
Units
C/W
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IRLI640G
Electrical Characteristics @ T = 25C (unless otherwise specified) J
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Min. 200 --- --- --- 1.0 16 --- --- --- --- --- --- --- --- --- --- ---
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.18 VGS = 5.0V, ID = 5.9A 0.27 VGS = 4.0V, ID = 5.0A 2.0 V VDS = VGS, ID = 250A --- S VDS = 50V, ID = 10A 25 VDS = 200V, VGS = 0V A 250 VDS = 160V, VGS = 0V, TJ = 160C 100 VGS = 10V nA -100 VGS = -10V 66 ID = 17A 9.0 nC VDS = 160V 38 VGS = 10V, See Fig. 6 and 13 --- VDD = 100V ns --- ID = 17A --- RG = 4.6 --- RD = 5.7, See Fig. 10 Between lead, --- 4.5 --- 6mm (0.25in.) nH from package --- 7.5 --- and center of die contact --- 1800 --- VGS = 0V --- 400 --- pF VDS = 25V --- 120 --- = 1.0MHz, See Fig. 5
Typ. --- 0.27 --- --- --- --- --- --- --- --- --- --- --- 8.0 83 44 52
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units --- --- --- --- --- --- --- --- 310 3.2 9.9 A 40 2.0 470 4.8 V ns C
Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 9.9A, VGS = 0V TJ = 25C, IF = 17A di/dt = 100A/s
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ISD 17A, di/dt 150A/s, VDD V(BR)DSS, TJ 150C Pulse width 300s; duty cycle 2%. t=60s, =60Hz
VDD = 25V, starting TJ = 25C, L = 4.4mH RG = 25, IAS = 9.9A. (See Figure 12)
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IRLI640G
100
VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.75V 2.50V BOTTOM 2.25V TOP
100
I D , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
10
10
VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.75V 2.50V BOTTOM 2.25V TOP
2.25V
1
1
2.25V
0.1
0.1
0.01 0.01
20s PULSE WIDTH TC = 25C
0.1 1 10
A
100
0.01 0.01
20s PULSE WIDTH TC = 150C
0.1 1 10
A
100
V DS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics, TC = 25oC
Fig 2. Typical Output Characteristics, TC = 150oC
100
R DS(on) , Drain-to-Source On Resistance (Normalized)
2.5
ID = 17A
I D , Drain-to-Source Current (A)
2.0
10
T = 150C J
1.5
TJ = 25C
1
1.0
0.5
0.1 2.0 2.5 3.0 3.5
V DS = 50V 20s PULSE WIDTH
4.0 4.5
A
5.0
0.0 -60 -40 -20
VGS = 5.0V A
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRLI640G
4000
VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = Cds + C gd
10
I D = 17A
8
V DS = 160V V DS = 100V V DS = 80V
C, Capacitance (pF)
3000
Ciss
6
2000
Coss
4
1000
Crss
2
0 1 10
A
100
0 0 20 40
FOR TEST CIRCUIT SEE FIGURE 13
60 80
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
10
T = 150C J TJ = 25C
1
ID , Drain Current (A)
100s
10
1ms
0.1 0.3 0.6 0.9 1.2
VGS = 0V
A
1 1
TC = 25C TJ = 150C Single Pulse
10 100
10ms
A
1000
1.5
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRLI640G
VDS
10
RD
VGS RG
D.U.T. VDD
ID, Drain Current (Amps)
8
5.0 V
6 Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
4
2
0 25 50 75 100 125
A
150
TC , Case Temperature (C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (ZthJC )
D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) 0.01
N o te s : 1 . D u ty fa c to r D = t / t 12 PD M
t
1
t 2
0.001 0.00001
2 . P e a k TJ = P D M x Z th J C + T C
A
10
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLI640G
EAS , Single Pulse Avalanche Energy (mJ)
700
TOP
600
ID 4.4A 6.3A BOTTOM 9.9A
5.0V
500
400
Fig 12a. Unclamped Inductive Test Circuit
300
200
100
0
VDD = 50V
25 50 75 100 125
A
150
Starting TJ , Juntion Temperature (C)
Fig 12b. Unclamped Inductive Waveforms
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
5.0V
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRLI640G
Peak Diode Recovery dv/dt Test Circuit
D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
RG
* * * *
dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
*
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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IRLI640G
Package Outline
TO-220 Full-Pak
Part Marking Information
TO-220 Full-Pak
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145 10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371 Data and specifications subject to change without notice.
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